MSP430 DriverLib for MSP430FR2xx_4xx Devices  2.91.13.01
rom_driverlib_fr253x_fr263x.h
1 //*****************************************************************************
2 //
3 // rom_driverlib_fr253x_fr263x.h - Macros to facilitate calling functions in
4 // ROM for MSP430FR2532, FR2533, FR2632, FR2633
5 //
6 // Copyright (c) 2014-2017 Texas Instruments Incorporated. All rights reserved.
7 // TI Information - Selective Disclosure
8 //
9 //*****************************************************************************
10 //
11 
12 #ifndef __ROM_DRIVERLIB_H__
13 #define __ROM_DRIVERLIB_H__
14 
15 #if (defined(__TI_COMPILER_VERSION__) && !defined(__LARGE_CODE_MODEL__)) || \
16  (defined(__IAR_SYSTEMS_ICC__) && (__CODE_MODEL__==__CODE_MODEL_SMALL__))
17 
18 //*****************************************************************************
19 //
20 // Pointers to the main API tables.
21 //
22 //*****************************************************************************
23 #define ROM_DRIVERLIB_APITABLE ((uint16_t *)0x67E0)
24 #define ROM_DRIVERLIB_VERSIONL (ROM_DRIVERLIB_APITABLE[0])
25 #define ROM_DRIVERLIB_VERSIONH (ROM_DRIVERLIB_APITABLE[1])
26 #define ROM_EUSCIASPITABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[2]))
27 #define ROM_EUSCIAUARTTABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[3]))
28 #define ROM_EUSCIBI2CTABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[4]))
29 #define ROM_EUSCIBSPITABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[5]))
30 
31 #define ROM_DRIVERLIB_getVersion() ((uint32_t)ROM_DRIVERLIB_VERSIONH<<16|\
32  ROM_DRIVERLIB_VERSIONL)
33 
34 //*****************************************************************************
35 //
36 // Macros for calling ROM functions in the EUSCIASPI API.
37 //
38 //*****************************************************************************
39 #define ROM_EUSCI_A_SPI_disableInterrupt \
40  ((void (*)(uint16_t baseAddress, \
41  uint8_t mask))ROM_EUSCIASPITABLE[0])
42 #define ROM_EUSCI_A_SPI_disable \
43  ((void (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[1])
44 #define ROM_EUSCI_A_SPI_isBusy \
45  ((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[2])
46 #define ROM_EUSCI_A_SPI_getReceiveBufferAddress \
47  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[3])
48 #define ROM_EUSCI_A_SPI_enableInterrupt \
49  ((void (*)(uint16_t baseAddress, \
50  uint8_t mask))ROM_EUSCIASPITABLE[4])
51 #define ROM_EUSCI_A_SPI_transmitData \
52  ((void (*)(uint16_t baseAddress, \
53  uint8_t transmitData))ROM_EUSCIASPITABLE[5])
54 #define ROM_EUSCI_A_SPI_changeMasterClock \
55  ((void (*)(uint16_t baseAddress, \
56  EUSCI_A_SPI_changeMasterClockParam *param))ROM_EUSCIASPITABLE[6])
57 #define ROM_EUSCI_A_SPI_initMaster \
58  ((void (*)(uint16_t baseAddress, \
59  EUSCI_A_SPI_initMasterParam *param))ROM_EUSCIASPITABLE[7])
60 #define ROM_EUSCI_A_SPI_changeClockPhasePolarity \
61  ((void (*)(uint16_t baseAddress, \
62  uint16_t clockPhase, \
63  uint16_t clockPolarity))ROM_EUSCIASPITABLE[8])
64 #define ROM_EUSCI_A_SPI_getInterruptStatus \
65  ((uint8_t (*)(uint16_t baseAddress, \
66  uint8_t mask))ROM_EUSCIASPITABLE[9])
67 #define ROM_EUSCI_A_SPI_select4PinFunctionality \
68  ((void (*)(uint16_t baseAddress, \
69  uint8_t select4PinFunctionality))ROM_EUSCIASPITABLE[10])
70 #define ROM_EUSCI_A_SPI_initSlave \
71  ((void (*)(uint16_t baseAddress, \
72  EUSCI_A_SPI_initSlaveParam *param))ROM_EUSCIASPITABLE[11])
73 #define ROM_EUSCI_A_SPI_enable \
74  ((void (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[12])
75 #define ROM_EUSCI_A_SPI_getTransmitBufferAddress \
76  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[13])
77 #define ROM_EUSCI_A_SPI_clearInterrupt \
78  ((void (*)(uint16_t baseAddress, \
79  uint8_t mask))ROM_EUSCIASPITABLE[14])
80 #define ROM_EUSCI_A_SPI_receiveData \
81  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[15])
82 
83 //*****************************************************************************
84 //
85 // Macros for calling ROM functions in the EUSCIAUART API.
86 //
87 //*****************************************************************************
88 #define ROM_EUSCI_A_UART_setDormant \
89  ((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[0])
90 #define ROM_EUSCI_A_UART_getTransmitBufferAddress \
91  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[1])
92 #define ROM_EUSCI_A_UART_disableInterrupt \
93  ((void (*)(uint16_t baseAddress, \
94  uint8_t mask))ROM_EUSCIAUARTTABLE[2])
95 #define ROM_EUSCI_A_UART_enable \
96  ((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[3])
97 #define ROM_EUSCI_A_UART_transmitData \
98  ((void (*)(uint16_t baseAddress, \
99  uint8_t transmitData))ROM_EUSCIAUARTTABLE[4])
100 #define ROM_EUSCI_A_UART_transmitBreak \
101  ((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[5])
102 #define ROM_EUSCI_A_UART_resetDormant \
103  ((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[6])
104 #define ROM_EUSCI_A_UART_init \
105  ((bool (*)(uint16_t baseAddress, \
106  EUSCI_A_UART_initParam *param))ROM_EUSCIAUARTTABLE[7])
107 #define ROM_EUSCI_A_UART_clearInterrupt \
108  ((void (*)(uint16_t baseAddress, \
109  uint8_t mask))ROM_EUSCIAUARTTABLE[8])
110 #define ROM_EUSCI_A_UART_transmitAddress \
111  ((void (*)(uint16_t baseAddress, \
112  uint8_t transmitAddress))ROM_EUSCIAUARTTABLE[9])
113 #define ROM_EUSCI_A_UART_receiveData \
114  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[10])
115 #define ROM_EUSCI_A_UART_enableInterrupt \
116  ((void (*)(uint16_t baseAddress, \
117  uint8_t mask))ROM_EUSCIAUARTTABLE[11])
118 #define ROM_EUSCI_A_UART_queryStatusFlags \
119  ((uint8_t (*)(uint16_t baseAddress, \
120  uint8_t mask))ROM_EUSCIAUARTTABLE[12])
121 #define ROM_EUSCI_A_UART_getReceiveBufferAddress \
122  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[13])
123 #define ROM_EUSCI_A_UART_getInterruptStatus \
124  ((uint8_t (*)(uint16_t baseAddress, \
125  uint8_t mask))ROM_EUSCIAUARTTABLE[14])
126 #define ROM_EUSCI_A_UART_selectDeglitchTime \
127  ((void (*)(uint16_t baseAddress, \
128  uint16_t deglitchTime))ROM_EUSCIAUARTTABLE[15])
129 #define ROM_EUSCI_A_UART_disable \
130  ((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[16])
131 
132 //*****************************************************************************
133 //
134 // Macros for calling ROM functions in the EUSCIBI2C API.
135 //
136 //*****************************************************************************
137 #define ROM_EUSCI_B_I2C_initSlave \
138  ((void (*)(uint16_t baseAddress, \
139  EUSCI_B_I2C_initSlaveParam *param))ROM_EUSCIBI2CTABLE[0])
140 #define ROM_EUSCI_B_I2C_masterSendMultiByteStop \
141  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[1])
142 #define ROM_EUSCI_B_I2C_isBusBusy \
143  ((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[2])
144 #define ROM_EUSCI_B_I2C_masterReceiveMultiByteNext \
145  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[3])
146 #define ROM_EUSCI_B_I2C_masterSendMultiByteStartWithTimeout \
147  ((bool (*)(uint16_t baseAddress, \
148  uint8_t txData, \
149  uint32_t timeout))ROM_EUSCIBI2CTABLE[4])
150 #define ROM_EUSCI_B_I2C_masterSendStart \
151  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[5])
152 #define ROM_EUSCI_B_I2C_disableInterrupt \
153  ((void (*)(uint16_t baseAddress, \
154  uint16_t mask))ROM_EUSCIBI2CTABLE[6])
155 #define ROM_EUSCI_B_I2C_initMaster \
156  ((void (*)(uint16_t baseAddress, \
157  EUSCI_B_I2C_initMasterParam *param))ROM_EUSCIBI2CTABLE[7])
158 #define ROM_EUSCI_B_I2C_clearInterrupt \
159  ((void (*)(uint16_t baseAddress, \
160  uint16_t mask))ROM_EUSCIBI2CTABLE[8])
161 #define ROM_EUSCI_B_I2C_getTransmitBufferAddress \
162  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[9])
163 #define ROM_EUSCI_B_I2C_masterReceiveMultiByteFinishWithTimeout \
164  ((bool (*)(uint16_t baseAddress, \
165  uint8_t *txData, \
166  uint32_t timeout))ROM_EUSCIBI2CTABLE[10])
167 #define ROM_EUSCI_B_I2C_masterReceiveSingleByte \
168  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[11])
169 #define ROM_EUSCI_B_I2C_setSlaveAddress \
170  ((void (*)(uint16_t baseAddress, \
171  uint8_t slaveAddress))ROM_EUSCIBI2CTABLE[12])
172 #define ROM_EUSCI_B_I2C_slaveGetData \
173  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[13])
174 #define ROM_EUSCI_B_I2C_masterSendSingleByte \
175  ((void (*)(uint16_t baseAddress, \
176  uint8_t txData))ROM_EUSCIBI2CTABLE[14])
177 #define ROM_EUSCI_B_I2C_masterSendMultiByteFinish \
178  ((void (*)(uint16_t baseAddress, \
179  uint8_t txData))ROM_EUSCIBI2CTABLE[15])
180 #define ROM_EUSCI_B_I2C_setMode \
181  ((void (*)(uint16_t baseAddress, \
182  uint8_t mode))ROM_EUSCIBI2CTABLE[16])
183 #define ROM_EUSCI_B_I2C_enable \
184  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[17])
185 #define ROM_EUSCI_B_I2C_masterSendMultiByteNext \
186  ((void (*)(uint16_t baseAddress, \
187  uint8_t txData))ROM_EUSCIBI2CTABLE[18])
188 #define ROM_EUSCI_B_I2C_getMode \
189  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[19])
190 #define ROM_EUSCI_B_I2C_masterReceiveSingle \
191  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[20])
192 #define ROM_EUSCI_B_I2C_disable \
193  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[21])
194 #define ROM_EUSCI_B_I2C_enableInterrupt \
195  ((void (*)(uint16_t baseAddress, \
196  uint16_t mask))ROM_EUSCIBI2CTABLE[22])
197 #define ROM_EUSCI_B_I2C_masterSendMultiByteNextWithTimeout \
198  ((bool (*)(uint16_t baseAddress, \
199  uint8_t txData, \
200  uint32_t timeout))ROM_EUSCIBI2CTABLE[23])
201 #define ROM_EUSCI_B_I2C_masterSendSingleByteWithTimeout \
202  ((bool (*)(uint16_t baseAddress, \
203  uint8_t txData, \
204  uint32_t timeout))ROM_EUSCIBI2CTABLE[24])
205 #define ROM_EUSCI_B_I2C_slavePutData \
206  ((void (*)(uint16_t baseAddress, \
207  uint8_t transmitData))ROM_EUSCIBI2CTABLE[25])
208 #define ROM_EUSCI_B_I2C_masterReceiveStart \
209  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[26])
210 #define ROM_EUSCI_B_I2C_getReceiveBufferAddress \
211  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[27])
212 #define ROM_EUSCI_B_I2C_disableMultiMasterMode \
213  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[28])
214 #define ROM_EUSCI_B_I2C_masterReceiveMultiByteFinish \
215  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[29])
216 #define ROM_EUSCI_B_I2C_masterIsStartSent \
217  ((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[30])
218 #define ROM_EUSCI_B_I2C_enableMultiMasterMode \
219  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[31])
220 #define ROM_EUSCI_B_I2C_masterSendMultiByteStart \
221  ((void (*)(uint16_t baseAddress, \
222  uint8_t txData))ROM_EUSCIBI2CTABLE[32])
223 #define ROM_EUSCI_B_I2C_masterSendMultiByteStopWithTimeout \
224  ((bool (*)(uint16_t baseAddress, \
225  uint32_t timeout))ROM_EUSCIBI2CTABLE[33])
226 #define ROM_EUSCI_B_I2C_masterSendMultiByteFinishWithTimeout \
227  ((bool (*)(uint16_t baseAddress, \
228  uint8_t txData, \
229  uint32_t timeout))ROM_EUSCIBI2CTABLE[34])
230 #define ROM_EUSCI_B_I2C_masterIsStopSent \
231  ((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[35])
232 #define ROM_EUSCI_B_I2C_masterReceiveMultiByteStop \
233  ((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[36])
234 #define ROM_EUSCI_B_I2C_getInterruptStatus \
235  ((uint16_t (*)(uint16_t baseAddress, \
236  uint16_t mask))ROM_EUSCIBI2CTABLE[37])
237 
238 //*****************************************************************************
239 //
240 // Macros for calling ROM functions in the EUSCIBSPI API.
241 //
242 //*****************************************************************************
243 #define ROM_EUSCI_B_SPI_enableInterrupt \
244  ((void (*)(uint16_t baseAddress, \
245  uint8_t mask))ROM_EUSCIBSPITABLE[0])
246 #define ROM_EUSCI_B_SPI_disable \
247  ((void (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[1])
248 #define ROM_EUSCI_B_SPI_clearInterrupt \
249  ((void (*)(uint16_t baseAddress, \
250  uint8_t mask))ROM_EUSCIBSPITABLE[2])
251 #define ROM_EUSCI_B_SPI_isBusy \
252  ((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[3])
253 #define ROM_EUSCI_B_SPI_getReceiveBufferAddress \
254  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[4])
255 #define ROM_EUSCI_B_SPI_changeMasterClock \
256  ((void (*)(uint16_t baseAddress, \
257  EUSCI_B_SPI_changeMasterClockParam *param))ROM_EUSCIBSPITABLE[5])
258 #define ROM_EUSCI_B_SPI_transmitData \
259  ((void (*)(uint16_t baseAddress, \
260  uint8_t transmitData))ROM_EUSCIBSPITABLE[6])
261 #define ROM_EUSCI_B_SPI_select4PinFunctionality \
262  ((void (*)(uint16_t baseAddress, \
263  uint8_t select4PinFunctionality))ROM_EUSCIBSPITABLE[7])
264 #define ROM_EUSCI_B_SPI_initSlave \
265  ((void (*)(uint16_t baseAddress, \
266  EUSCI_B_SPI_initSlaveParam *param))ROM_EUSCIBSPITABLE[8])
267 #define ROM_EUSCI_B_SPI_disableInterrupt \
268  ((void (*)(uint16_t baseAddress, \
269  uint8_t mask))ROM_EUSCIBSPITABLE[9])
270 #define ROM_EUSCI_B_SPI_getTransmitBufferAddress \
271  ((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[10])
272 #define ROM_EUSCI_B_SPI_changeClockPhasePolarity \
273  ((void (*)(uint16_t baseAddress, \
274  uint16_t clockPhase, \
275  uint16_t clockPolarity))ROM_EUSCIBSPITABLE[11])
276 #define ROM_EUSCI_B_SPI_receiveData \
277  ((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[12])
278 #define ROM_EUSCI_B_SPI_getInterruptStatus \
279  ((uint8_t (*)(uint16_t baseAddress, \
280  uint8_t mask))ROM_EUSCIBSPITABLE[13])
281 #define ROM_EUSCI_B_SPI_initMaster \
282  ((void (*)(uint16_t baseAddress, \
283  EUSCI_B_SPI_initMasterParam *param))ROM_EUSCIBSPITABLE[14])
284 #define ROM_EUSCI_B_SPI_enable \
285  ((void (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[15])
286 
287 #else
288 #error "Large code model is not supported"
289 #endif
290 
291 #endif // __ROM_DRIVERLIB_H__

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