7 #ifndef __MSP430WARE_SD24_B_H__ 8 #define __MSP430WARE_SD24_B_H__ 10 #include "inc/hw_memmap.h" 12 #ifdef __MSP430_HAS_SD24_B__ 25 #include "inc/hw_memmap.h" 217 #define SD24_B_CLOCKSOURCE_MCLK (SD24SSEL__MCLK) 218 #define SD24_B_CLOCKSOURCE_SMCLK (SD24SSEL__SMCLK) 219 #define SD24_B_CLOCKSOURCE_ACLK (SD24SSEL__ACLK) 220 #define SD24_B_CLOCKSOURCE_SD24CLK (SD24SSEL__SD24CLK) 229 #define SD24_B_REF_EXTERNAL (0x00) 230 #define SD24_B_REF_INTERNAL (SD24REFS) 239 #define SD24_B_PRECLOCKDIVIDER_1 (SD24PDIV_0) 240 #define SD24_B_PRECLOCKDIVIDER_2 (SD24PDIV_1) 241 #define SD24_B_PRECLOCKDIVIDER_4 (SD24PDIV_2) 242 #define SD24_B_PRECLOCKDIVIDER_8 (SD24PDIV_3) 243 #define SD24_B_PRECLOCKDIVIDER_16 (SD24PDIV_4) 244 #define SD24_B_PRECLOCKDIVIDER_32 (SD24PDIV_5) 245 #define SD24_B_PRECLOCKDIVIDER_64 (SD24PDIV_6) 246 #define SD24_B_PRECLOCKDIVIDER_128 (SD24PDIV_7) 255 #define SD24_B_CLOCKDIVIDER_1 (0x00) 256 #define SD24_B_CLOCKDIVIDER_2 (SD24DIV0) 257 #define SD24_B_CLOCKDIVIDER_3 (SD24DIV1) 258 #define SD24_B_CLOCKDIVIDER_4 (SD24DIV1 | SD24DIV0) 259 #define SD24_B_CLOCKDIVIDER_5 (SD24DIV2) 260 #define SD24_B_CLOCKDIVIDER_6 (SD24DIV2 | SD24DIV0) 261 #define SD24_B_CLOCKDIVIDER_7 (SD24DIV2 | SD24DIV1) 262 #define SD24_B_CLOCKDIVIDER_8 (SD24DIV2 | SD24DIV1 | SD24DIV0) 263 #define SD24_B_CLOCKDIVIDER_9 (SD24DIV3) 264 #define SD24_B_CLOCKDIVIDER_10 (SD24DIV3 | SD24DIV0) 265 #define SD24_B_CLOCKDIVIDER_11 (SD24DIV3 | SD24DIV1) 266 #define SD24_B_CLOCKDIVIDER_12 (SD24DIV3 | SD24DIV1 | SD24DIV0) 267 #define SD24_B_CLOCKDIVIDER_13 (SD24DIV3 | SD24DIV2) 268 #define SD24_B_CLOCKDIVIDER_14 (SD24DIV3 | SD24DIV2 | SD24DIV0) 269 #define SD24_B_CLOCKDIVIDER_15 (SD24DIV3 | SD24DIV2 | SD24DIV1) 270 #define SD24_B_CLOCKDIVIDER_16 (SD24DIV3 | SD24DIV2 | SD24DIV1 | SD24DIV0) 271 #define SD24_B_CLOCKDIVIDER_17 (SD24DIV4) 272 #define SD24_B_CLOCKDIVIDER_18 (SD24DIV4 | SD24DIV0) 273 #define SD24_B_CLOCKDIVIDER_19 (SD24DIV4 | SD24DIV1) 274 #define SD24_B_CLOCKDIVIDER_20 (SD24DIV4 | SD24DIV1 | SD24DIV0) 275 #define SD24_B_CLOCKDIVIDER_21 (SD24DIV4 | SD24DIV2) 276 #define SD24_B_CLOCKDIVIDER_22 (SD24DIV4 | SD24DIV2 | SD24DIV0) 277 #define SD24_B_CLOCKDIVIDER_23 (SD24DIV4 | SD24DIV2 | SD24DIV1) 278 #define SD24_B_CLOCKDIVIDER_24 (SD24DIV4 | SD24DIV2 | SD24DIV1 | SD24DIV0) 279 #define SD24_B_CLOCKDIVIDER_25 (SD24DIV4 | SD24DIV3) 280 #define SD24_B_CLOCKDIVIDER_26 (SD24DIV4 | SD24DIV3 | SD24DIV0) 281 #define SD24_B_CLOCKDIVIDER_27 (SD24DIV4 | SD24DIV3 | SD24DIV1) 282 #define SD24_B_CLOCKDIVIDER_28 (SD24DIV4 | SD24DIV3 | SD24DIV1 | SD24DIV0) 283 #define SD24_B_CLOCKDIVIDER_29 (SD24DIV4 | SD24DIV3 | SD24DIV2) 284 #define SD24_B_CLOCKDIVIDER_30 (SD24DIV4 | SD24DIV3 | SD24DIV2 | SD24DIV0) 285 #define SD24_B_CLOCKDIVIDER_31 (SD24DIV4 | SD24DIV3 | SD24DIV2 | SD24DIV1) 286 #define SD24_B_CLOCKDIVIDER_32 \ 287 (SD24DIV4 | SD24DIV3 | SD24DIV2 | SD24DIV1 | SD24DIV0) 295 #define SD24_B_CONTINUOUS_MODE (0x00) 296 #define SD24_B_SINGLE_MODE (SD24SNGL_H) 311 #define SD24_B_CONVERTER_0 0 312 #define SD24_B_CONVERTER_1 1 313 #define SD24_B_CONVERTER_2 2 314 #define SD24_B_CONVERTER_3 3 315 #define SD24_B_CONVERTER_4 4 316 #define SD24_B_CONVERTER_5 5 317 #define SD24_B_CONVERTER_6 6 318 #define SD24_B_CONVERTER_7 7 326 #define SD24_B_ALIGN_RIGHT (0x00) 327 #define SD24_B_ALIGN_LEFT (SD24ALGN) 335 #define SD24_B_CONVERSION_SELECT_SD24SC (SD24SCS__SD24SC) 336 #define SD24_B_CONVERSION_SELECT_EXT1 (SD24SCS__EXT1) 337 #define SD24_B_CONVERSION_SELECT_EXT2 (SD24SCS__EXT2) 338 #define SD24_B_CONVERSION_SELECT_EXT3 (SD24SCS__EXT3) 339 #define SD24_B_CONVERSION_SELECT_GROUP0 (SD24SCS__GROUP0) 340 #define SD24_B_CONVERSION_SELECT_GROUP1 (SD24SCS__GROUP1) 341 #define SD24_B_CONVERSION_SELECT_GROUP2 (SD24SCS__GROUP2) 342 #define SD24_B_CONVERSION_SELECT_GROUP3 (SD24SCS__GROUP3) 351 #define SD24_B_OVERSAMPLE_32 (OSR__32) 352 #define SD24_B_OVERSAMPLE_64 (OSR__64) 353 #define SD24_B_OVERSAMPLE_128 (OSR__128) 354 #define SD24_B_OVERSAMPLE_256 (OSR__256) 355 #define SD24_B_OVERSAMPLE_512 (OSR__512) 356 #define SD24_B_OVERSAMPLE_1024 (OSR__1024) 365 #define SD24_B_DATA_FORMAT_BINARY (SD24DF_0) 366 #define SD24_B_DATA_FORMAT_2COMPLEMENT (SD24DF_1) 375 #define SD24_B_GAIN_1 (SD24GAIN_1) 376 #define SD24_B_GAIN_2 (SD24GAIN_2) 377 #define SD24_B_GAIN_4 (SD24GAIN_4) 378 #define SD24_B_GAIN_8 (SD24GAIN_8) 379 #define SD24_B_GAIN_16 (SD24GAIN_16) 380 #define SD24_B_GAIN_32 (SD24GAIN_32) 381 #define SD24_B_GAIN_64 (SD24GAIN_64) 382 #define SD24_B_GAIN_128 (SD24GAIN_128) 391 #define SD24_B_FOURTH_SAMPLE_INTERRUPT (SD24INTDLY_0) 392 #define SD24_B_THIRD_SAMPLE_INTERRUPT (SD24INTDLY_1) 393 #define SD24_B_SECOND_SAMPLE_INTERRUPT (SD24INTDLY_2) 394 #define SD24_B_FIRST_SAMPLE_INTERRUPT (SD24INTDLY_3) 402 #define SD24_B_GROUP0 0 403 #define SD24_B_GROUP1 1 404 #define SD24_B_GROUP2 2 405 #define SD24_B_GROUP3 3 413 #define SD24_B_DMA_TRIGGER_IFG0 (SD24DMA_0) 414 #define SD24_B_DMA_TRIGGER_IFG1 (SD24DMA_1) 415 #define SD24_B_DMA_TRIGGER_IFG2 (SD24DMA_2) 416 #define SD24_B_DMA_TRIGGER_IFG3 (SD24DMA_3) 417 #define SD24_B_DMA_TRIGGER_IFG4 (SD24DMA_4) 418 #define SD24_B_DMA_TRIGGER_IFG5 (SD24DMA_5) 419 #define SD24_B_DMA_TRIGGER_IFG6 (SD24DMA_6) 420 #define SD24_B_DMA_TRIGGER_IFG7 (SD24DMA_7) 421 #define SD24_B_DMA_TRIGGER_TRGIFG (SD24DMA_8) 431 #define SD24_B_CONVERTER_INTERRUPT SD24IE0 432 #define SD24_B_CONVERTER_OVERFLOW_INTERRUPT SD24OVIE0 650 uint16_t interruptFlag);
685 uint8_t sampleDelay);
716 uint16_t cycleDelay);
750 uint16_t oversampleRatio);
975 #endif // __MSP430WARE_SD24_B_H__ void SD24_B_setConverterDataFormat(uint16_t baseAddress, uint8_t converter, uint8_t dataFormat)
Set SD24_B converter data format.
Definition: sd24_b.c:82
void SD24_B_setOversampling(uint16_t baseAddress, uint8_t converter, uint16_t oversampleRatio)
Configures the oversampling ratio for a converter.
Definition: sd24_b.c:182
Used in the SD24_B_init() function as the param parameter.
Definition: sd24_b.h:31
uint8_t converter
Definition: sd24_b.h:152
void SD24_B_startGroupConversion(uint16_t baseAddress, uint8_t group)
Start Conversion Group.
Definition: sd24_b.c:94
uint32_t SD24_B_getResults(uint16_t baseAddress, uint8_t converter)
Returns the results for a converter.
Definition: sd24_b.c:207
void SD24_B_init(uint16_t baseAddress, SD24_B_initParam *param)
Initializes the SD24_B Module.
Definition: sd24_b.c:21
uint16_t referenceSelect
Definition: sd24_b.h:89
void SD24_B_startConverterConversion(uint16_t baseAddress, uint8_t converter)
Start Conversion for Converter.
Definition: sd24_b.c:124
uint16_t SD24_B_getInterruptStatus(uint16_t baseAddress, uint8_t converter, uint16_t mask)
Returns the interrupt status for the SD24_B Module.
Definition: sd24_b.c:256
uint8_t converter
Definition: sd24_b.h:109
void SD24_B_stopGroupConversion(uint16_t baseAddress, uint8_t group)
Stop Conversion Group.
Definition: sd24_b.c:109
void SD24_B_initConverter(uint16_t baseAddress, SD24_B_initConverterParam *param)
Configure SD24_B converter.
Definition: sd24_b.c:41
uint8_t alignment
Definition: sd24_b.h:114
uint8_t dataFormat
Definition: sd24_b.h:179
uint8_t conversionMode
Definition: sd24_b.h:174
uint16_t oversampleRatio
Definition: sd24_b.h:195
uint8_t startSelect
Definition: sd24_b.h:125
void SD24_B_setConversionDelay(uint16_t baseAddress, uint8_t converter, uint16_t cycleDelay)
Configures the delay for the conversion start.
Definition: sd24_b.c:170
void SD24_B_enableInterrupt(uint16_t baseAddress, uint8_t converter, uint16_t mask)
Enables interrupts for the SD24_B Module.
Definition: sd24_b.c:234
void SD24_B_setGain(uint16_t baseAddress, uint8_t converter, uint8_t gain)
Configures the gain for the converter.
Definition: sd24_b.c:195
uint8_t gain
Definition: sd24_b.h:206
uint8_t conversionMode
Definition: sd24_b.h:131
void SD24_B_configureDMATrigger(uint16_t baseAddress, uint16_t interruptFlag)
Configures the converter that triggers a DMA transfer.
Definition: sd24_b.c:148
void SD24_B_initConverterAdvanced(uint16_t baseAddress, SD24_B_initConverterAdvancedParam *param)
Configure SD24_B converter - Advanced Configure.
Definition: sd24_b.c:53
Used in the SD24_B_initConverterAdvanced() function as the param parameter.
Definition: sd24_b.h:140
uint16_t clockSourceSelect
Definition: sd24_b.h:38
uint16_t clockPreDivider
Definition: sd24_b.h:49
void SD24_B_setInterruptDelay(uint16_t baseAddress, uint8_t converter, uint8_t sampleDelay)
Configures the delay for an interrupt to trigger.
Definition: sd24_b.c:158
uint8_t startSelect
Definition: sd24_b.h:168
Used in the SD24_B_initConverter() function as the param parameter.
Definition: sd24_b.h:97
uint8_t alignment
Definition: sd24_b.h:157
void SD24_B_disableInterrupt(uint16_t baseAddress, uint8_t converter, uint16_t mask)
Disables interrupts for the SD24_B Module.
Definition: sd24_b.c:242
uint8_t sampleDelay
Definition: sd24_b.h:186
void SD24_B_clearInterrupt(uint16_t baseAddress, uint8_t converter, uint16_t mask)
Clears interrupts for the SD24_B Module.
Definition: sd24_b.c:249
void SD24_B_stopConverterConversion(uint16_t baseAddress, uint8_t converter)
Stop Conversion for Converter.
Definition: sd24_b.c:136
uint16_t clockDivider
Definition: sd24_b.h:84
uint16_t SD24_B_getHighWordResults(uint16_t baseAddress, uint8_t converter)
Returns the high word results for a converter.
Definition: sd24_b.c:222